While it has been enlightening to look at some basic I-V curves of two-terminal devices, to ease my experimentation with home made transistors I need something that will step the signal to the third terminal. In the case of cuprous oxide or point-contact transistors this takes the form of a stepped current, and if I do as planned and experiment with crude thin film field effect transistors it would be a stepped voltage.
Even though there are cheaply available commercial solutions, I want to build it myself, of course.
And since I'm really perverse, I'll be relying on analog techniques.
My first go at a design was through using LTSpice, but I have not yet been able get it to work as it does in the simulations. Big Surprise, right? It's certainly not the first time I've been misled by circuit simulators.
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhJ0_L72yimoCxsdJRqv9xcVRmgGRKcSZdnuj-UID5yQdjH1CZte-jNJ2BmWq9yGRoJCwmVeVZ1bCOFjb3Se_kkY6a5JhRLAuhbDJED2PqoNUL3KhL-SG4h2i5G33OLlnQ2WyjB03TESwjI/s1600/LTSpice_circuit1.jpg) |
It works just fine for a variety of different step intervals and step numbers, in simulation. |
The above circuit seemed like a reasonable way to go about things. I use a voltage doubler to create a current pulse once per cycle timed to coincide with the middle of a flat portion of the stepped ramp applied to the base of the device under test - DUT, or Q4 in the schematic. The ramp is generated by the interesting configuration of Q2 and Q1, which are fed by square waves from the comparator U2, buffered by Q3. The basic idea is that one cycle of the square wave, via C2, charges C1 through Q1. This turns on Q2 which reinforces the original voltage on the base of Q1. In theory it should remain steady until another pulse arrives through C2, stepping the voltage higher until the comparator U3 triggers, turning on M2 and shorting the base of Q1 to ground, discharging both C1 and C4, resetting the circuit for another accumulation. In practice the circuit proved very unstable, either ramping up and not discharging, or else discharging and not ramping up. There was a critical setting of R6/R7 that allowed repeated ramping, but there was a varying dead time between each ramp, and it is neccesary to be able to control both the peak ramp voltage and step interval over a wide range.
I've tried to duplicate the problem behavior in simulation, but have been unable so far. The circuit as built, minus the 5V regulator:
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhmmIx7nHutyDKwFn64xl3u6wf58vsjPFbGa_xw7fX3HamamzYGuWPmBvNpph340Lzo0vK5Z0vmiLdxlkPgGfFg8mN4JBUqnfPHxfzqsuyH8TRERX8BDdSHZr6oDyxPywR79gLDcjGQRwit/s1600/builtV1.jpg) |
One way I prototype circuits that shouldn't require a ground plane is this - the copper clad is sawed into little islands, with long strips glued down with cyanoacrylate for ground and supply voltages. The 16-DIP socket also has its own "surf board." |
After browsing for more ideas on how to create the stepped ramp (that don't include using a microcontroller), I decided to try out something with basic digital methods. Looking around in my collection of parts I found I had several each of surface mount CD4013 and CD4017, a dual D flip-flop and a decade counter. I decided to use the flip-flop to generate a square wave from the 60Hz input by pulling the clock, data, and reset pins high, and feeding the AC signal to the set pin via a large resistance and/or small capacitance. The Q pin should then have a relatively clean square wave. This gets buffered by a CD4049, which I only had in DIP version, and fed to the CD4017. The output pins of the CD4017 have resistors tying them all together and buffered/amplified by an op-amp. As I want the voltage step value to be relatively constant, the resistors are nonlinearly spread in value from 10k to 200k. Output 0 has 200k, and output 9 has 10k. The circuit is not yet finished, but it did present an excellent reason to try out hand-drawing and etching a PCB.
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiKLbgmSYPxJCMXFX32yT90IsvTPhA6OsFxjiSN_Ml92ecQTfGYfjxR5__Qje4Sj3zuRYZ4cKczt0dtJTeW2J7wYLywEDHQu8tpgdHkrk5s5mzzc9H5ZFDNqLNO4jFrPboVPACa72bzi3gU/s1600/test+etch.jpg) |
This was a test of two methods new for me: hand drawing with a sharpie marker, and using 1:1 31% HCL and 3% H2O2, or muriatic acid from a hardware store and hydrogen peroxide from a drugstore. |
I decided a little breakout board for a 16 pin surface mount (SOIC) chip would make a fine test of my ability to create usable single sided PCBs at home. The results were excellent! This is way easier than messing with heat transfers of toner and ferric chloride. Plus, the etchant takes on a lovely emerald green color. Supposedly this mix will not have to be discarded; it can be rejuvenated by re-oxygenation by bubbling air through it or adding more H2O2. A capful of muriatic acid may eventually be needed, says the internet, but only if that pretty green color can't be achieved through oxygenation.
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgK0HfTxLthcdC_x8hxOfUniDzqqHfy-L6k9xGML6P-CXSdCeuQFlNpYok9VsjaUKYVllpgQgoMSmvDnNHpEz3LDdUVY7IVgnL7igPdHFsPVu4QSRdri92pbmAWf8TQs459mgd0H6QqclFv/s1600/tracer+bare.jpg) |
Freshly etched bare board. |
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgIPgeOMix8xXdp4nU2OFVNQVjXfXUkjtjkC9bW-Win8IKH7RJ-JOi7pYjRUMDExRM-3GV6XYZW_AhZ6hgJtz_hmlspDTNWUixoPuNIlPcLtkkFxw8oXLUaRxSVwM-TDmJWck5xukkN3S04/s1600/tracer_etch.jpg) |
half populated next attempt at stepped ramp generator for curve tracer |
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I suppose even the most extreme radical fundamentalist homebrew electronics devotees such as myself can get dragged into the future. All the traces came out fine on the above board, which is my first ever home-built circuit to use surface mount chips. As you can see, I don't currently have a stock of surface mount resistors, but that will change soon as this first attempt went so well for the SOICs. That 5V regulator missing from the previous circuit can be seen attached to this one. Also seen is the oddity of a DIP being attached as if it were a SOIC. Too think of how much more time it takes me to assemble circuits dead-bug style, or Manhattan style, or ugly style, or on perf board, when compared to how fast I made this PCB and how easily these chips when on.. ..and I was already not feeling very well today. If I were to drill a few strategic vias before etching I could even do this for 2 sided boards without much added difficulty.
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